at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 770

• Manufacturer Part Number: at91sam9260-cj
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

44.3.6.4
44.3.7
44.3.7.1
44.3.8
44.3.8.1
44.3.9
44.3.9.1
770
AT91SAM9260
Static Memory Controller
System Controller
Two-wire Interface (TWI)
Periodic Transmission Limitations in Master Mode
High Drive Strength
Possible event loss when reading RTT_SR
Switch from slave to master mode
If Least Significant Bit is sent first (MSBF = 0) the first TAG during the frame synchro is not sent.
None.
The I/O output buffer drive is too high to guarantee the timings. This is applicable to the External
Bus Interface signals and to the peripheral I/Os.
This leads to fast rise and fall time when the signals change, causing high currents to be drawn
on the power supply pins and leads to emission of high frequencies. This may affect the opera-
tion of the device and may result in the emission of radio-frequency signals, making EMC
certification difficult.
It is strongly recommended:
If an event (RTTINC or ALMS) occurs within the same slow clock cycle as when the RTT_SR is
read, the corresponding bit might be cleared. This can lead to the loss of this event.
The software must handle an RTT event as an interrupt and should not poll RTT_SR.
At the end of transfer in slave mode, the slave mode is disabled, the master mode is enabled
and thus a transfer in master mode can be performed. In the current device, the start event is
correctly generated but the SCL line is stuck at 1, so no transfer is possible.
Two workarounds are possible:
or
• to place the memories connected to the EBI as close as possible to the SAM9260 on the
• to route all the EBI signals with a series resistor, typical value 33 ohms
• to adjust the series resistor value with tools taking into account the IBIS model of the pads
1. Perform a software reset before going to master mode (TWI must be reconfigured).
2. Perform a slave read access before switching to master mode.
PCB
and the characteristics of the wires of the PCB, in order to guarantee rise and fall times as
long as timings permit.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
6221G–ATARM–31-Jan-08