at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 395

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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Figure 31-15. TWI Write Operation with Single Data Byte and Internal Address
395
AT91SAM9260
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size (IADRSZ)
- Device slave address (DADR)
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the internal address
Set the Control register:
TWI_IADR = address
Load transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
Transfer finished
- Master enable
Yes
TXCOMP = 1?
Set TWI clock
TXRDY = 1?
Yes
BEGIN
No
No
6221G–ATARM–31-Jan-08

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