at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 31
at91sam9260-cj
Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9260-CJ.pdf
(790 pages)
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9.11
9.12
6221G–ATARM–31-Jan-08
Debug Unit
Chip Identification
• Three External Sources plus the Fast Interrupt signal
• 8-level Priority Controller
• Vectoring
• Protect Mode
• Fast Forcing
• Composed of two functions:
• Two-pin UART
• Debug Communication Channel Support
• Chip ID: 0x019803A2
• JTAG ID: 0x05B1303F
• ARM926 TAP ID: 0x0792603F
– Programmable Edge-triggered or Level-sensitive Internal Sources
– Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
– Drives the Normal Interrupt of the processor
– Handles priority of the interrupt sources 1 to 31
– Higher priority interrupts can be served during service of lower priority interrupt
– Optimizes Interrupt Service Routine Branch and Execution
– One 32-bit Vector Register per interrupt source
– Interrupt Vector Register reads the corresponding current Interrupt Vector
– Easy debugging by preventing automatic operations when protect models are
– Permits redirecting any normal interrupt source on the Fast Interrupt of the
– Two-pin UART
– Debug Communication Channel (DCC) support
– Implemented features are 100% compatible with the standard Atmel
– Independent receiver and transmitter with a common programmable Baud Rate
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Support for two PDC channels with connection to receiver and transmitter
– Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from
enabled
processor
Generator
the ARM Processor’s ICE Interface
AT91SAM9260
®
USART
31
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