at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 747

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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41.9.2
Table 41-27. ISI Timings with Peripheral Supply 3.3V
Table 41-28. ISI Timings with Peripheral Supply 2.5V
Table 41-29. ISI Timings with Peripheral Supply 1.8V
41.9.3
6221G–ATARM–31-Jan-08
Symbol
ISI1
ISI2
ISI3
Symbol
ISI1
ISI2
ISI3
Symbol
ISI1
ISI2
ISI3
ISI
MCI
Parameter
DATA/VSYNC/HSYNC setup time
DATA/VSYNC/HSYNC hold time
PIXCLK frequency
Parameter
DATA/VSYNC/HSYNC setup time
DATA/VSYNC/HSYNC hold time
PIXCLK frequency
Parameter
DATA/VSYNC/HSYNC setup time
DATA/VSYNC/HSYNC hold time
PIXCLK frequency
Figure 41-10. ISI Timing Diagram
The PDC interface block controls all data routing between the external data bus, internal
MMC/SD module data bus, and internal system FIFO access through a dedicated state machine
that monitors the status of FIFO content (empty or full), FIFO address, and byte/block counters
for the MMC/SD module (inner system) and the application (user programming).
These timings are given for a 25 pF load, corresponding to 1 MMC/SD Card.
Figure 41-11. MCI Timing Diagram
DATA[7:0]
VSYNC
HSYNC
PIXCLK
CMD_DAT Output
CMD_DAT Input
Bus Clock
5a
Valid Data
Min
0
3.96
Min
0
4.14
Min
0
4.56
3a
1
4a
Valid Data
2
3b
6a
Valid Data
Valid Data
1
7
Max
74.8
Max
69.8
Max
64.4
2
3
AT91SAM9260
Valid Data
Valid Data
Valid Data
6b
5b
4b
Units
ns
ns
MHz
Units
ns
ns
MHz
Units
ns
ns
MHz
747

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