at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 229

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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23. Error Corrected Code Controller (ECCC)
23.1
23.2
Figure 23-1. Block Diagram
23.3
6221G–ATARM–31-Jan-08
Description
Block Diagram
Functional Description
NAND Flash/SmartMedia devices contain by default invalid blocks which have one or more
invalid bits. Over the NAND Flash/SmartMedia lifetime, additional invalid blocks may occur
which can be detected/corrected by ECC code.
The ECC Controller is a mechanism that encodes data in a manner that makes possible the
identification and correction of certain errors in data. The ECC controller is capable of single bit
error correction and 2-bit random detection. When NAND Flash/SmartMedia have more than 2
bits of errors, the data cannot be corrected.
The ECC user interface is compliant with the ARM
A page in NAND Flash and SmartMedia memories contains an area for main data and an addi-
tional area used for redundancy (ECC). The page is organized in 8-bit or 16-bit words. The page
size corresponds to the number of words in the main area plus the number of words in the extra
area used for redundancy.
Controller
Memory
APB
Static
Ctrl/ECC Algorithm
User Interface
Controller
ECC
NAND Flash
SmartMedia
Logic
®
Advanced Peripheral Bus (APB rev2).
AT91SAM9260
229

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