mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 194

• Manufacturer Part Number: mc9s12e256
• Description: Hcs12 Microcontrollers 16-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 4 Clocks and Reset Generator (CRGV4)
4.4.10.1
Wake-up from pseudo-stop is the same as wake-up from wait mode. There are also three different
scenarios for the CRG to restart the MCU from pseudo-stop mode:
If the MCU gets an external reset during pseudo-stop mode active, the CRG asynchronously restores all
configuration bits in the register space to its default settings and starts the reset generator. After completing
the reset sequence processing begins by fetching the normal reset vector. Pseudo-stop mode is exited and
the MCU is in run mode again.
If the clock monitor is enabled (CME = 1) the MCU is able to leave pseudo-stop mode when loss of
oscillator/external clock is detected by a clock monitor fail. If the SCME bit is not asserted the CRG
generates a clock monitor fail reset (CMRESET). The CRG’s behavior for CMRESET is the same
compared to external reset, but another reset vector is fetched after completion of the reset sequence. If the
SCME bit is asserted the CRG generates a SCM interrupt if enabled (SCMIE=1). After generating the
interrupt the CRG enters self-clock mode and starts the clock quality checker (see
Quality
SCMIE = 0, the SCMIF flag will be asserted but the CRG will not wake-up from pseudo-stop mode.
If any other interrupt source (e.g. RTI) triggers exit from pseudo-stop mode the MCU immediately
continues with normal operation. Because the PLL has been powered-down during stop mode the PLLSEL
bit is cleared and the MCU runs on OSCCLK after leaving stop mode. The software must set the PLLSEL
bit again, in order to switch system and core clocks to the PLLCLK.
Table 4-12
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External reset
Clock monitor fail
Wake-up interrupt
Checker”). Then the MCU continues with normal operation. If the SCM interrupt is blocked by
summarizes the outcome of a clock loss while in pseudo-stop mode.
Wake-Up from Pseudo-Stop (PSTP=1)
MC9S12E256 Data Sheet, Rev. 1.08
Section 4.4.4, “Clock
Freescale Semiconductor