mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 264

• Manufacturer Part Number: mc9s12e256
• Description: Hcs12 Microcontrollers 16-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 8 Serial Communication Interface (SCIV4)
indicating that the received byte can be read. If the receive interrupt enable bit, RIE, in SCI control register
2 (SCICR2) is also set, the RDRF flag generates an RDRF interrupt request.
8.4.5.3
The receiver samples the RXD pin at the RT clock rate. The RT clock is an internal signal with a frequency
16 times the baud rate. To adjust for baud rate mismatch, the RT clock (see
re-synchronized:
To locate the start bit, data recovery logic does an asynchronous search for a logic 0 preceded by three
logic 1s. When the falling edge of a possible start bit occurs, the RT clock begins to count to 16.
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5, and RT7.
Table 8-14
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
264
RT CLOCK COUNT
RESET RT CLOCK
•
•
After every start bit
After the receiver detects a data bit change from logic 1 to logic 0 (after the majority of data bit
samples at RT8, RT9, and RT10 returns a valid logic 1 and the majority of the next RT8, RT9, and
RT10 samples returns a valid logic 0)
RT CLOCK
SAMPLES
summarizes the results of the start bit verification samples.
RXD
Data Sampling
1
RT3, RT5, and RT7 Samples
1
1
1
000
001
010
011
100
101
110
111
1
QUALIFICATION
Figure 8-15. Receiver Data Sampling
1
START BIT
Table 8-14. Start Bit Verification
MC9S12E256 Data Sheet, Rev. 1.08
1
1
0
0
VERIFICATION
Start Bit Verification
START BIT
0
Yes
Yes
Yes
Yes
No
No
No
No
0
START BIT
SAMPLING
0
DATA
0
0
Noise Flag
Figure
0
1
1
0
1
0
0
0
8-15) is
Freescale Semiconductor
LSB