mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 453

• Manufacturer Part Number: mc9s12e256
• Description: Hcs12 Microcontrollers 16-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

15.4
The BDM receives and executes commands from a host via a single wire serial interface. There are two
types of BDM commands, namely, hardware commands and firmware commands.
Hardware commands are used to read and write target system memory locations and to enter active
background debug mode, see
includes all memory that is accessible by the CPU.
Firmware commands are used to read and write CPU resources and to exit from active background debug
mode, see
accumulator (D), X index register (X), Y index register (Y), stack pointer (SP), and program counter (PC).
Hardware commands can be executed at any time and in any mode excluding a few exceptions as
highlighted, see
when the system is in active background debug mode (BDM).
15.4.1
If the user resets into special single-chip mode with the system secured, a secured mode BDM firmware
lookup table is brought into the map overlapping a portion of the standard BDM firmware lookup table.
The secure BDM firmware verifies that the on-chip EEPROM and FLASH EEPROM are erased. This
being the case, the UNSEC bit will get set. The BDM program jumps to the start of the standard BDM
firmware and the secured mode BDM firmware is turned off and all BDM commands are allowed. If the
EEPROM or FLASH do not verify as erased, the BDM firmware sets the ENBDM bit, without asserting
UNSEC, and the firmware enters a loop. This causes the BDM hardware commands to become enabled,
but does not enable the firmware commands. This allows the BDM hardware to be used to erase the
EEPROM and FLASH. After execution of the secure firmware, regardless of the results of the erase tests,
the CPU registers, INITEE and PPAGE, will no longer be in their reset state.
15.4.2
The system must be in active BDM to execute standard BDM firmware commands. BDM can be activated
only after being enabled. BDM is enabled by setting the ENBDM bit in the BDM status (BDMSTS)
register. The ENBDM bit is set by writing to the BDM status (BDMSTS) register, via the single-wire
interface, using a hardware command such as WRITE_BD_BYTE.
After being enabled, BDM is activated by one of the following
1. BDM is enabled and active immediately out of special single-chip reset.
2. This method is only available on systems that have a a breakpoint or a debug sub-block.
Freescale Semiconductor
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Hardware BACKGROUND command
BDM external instruction tagging mechanism
CPU BGND instruction
Breakpoint sub-block’s force or tag mechanism
Functional Description
Section 15.4.4, “Standard BDM Firmware
Security
Enabling and Activating BDM
Section 15.4.3, “BDM Hardware
Section 15.4.3, “BDM Hardware
MC9S12E256 Data Sheet, Rev. 1.08
Commands.” Firmware commands can only be executed
Commands.” The CPU resources referred to are the
2
1
Commands.” Target system memory
:
Chapter 15 Background Debug Module (BDMV4)
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