mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 354

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mc9s12e256

Manufacturer Part Number
mc9s12e256
Description
Hcs12 Microcontrollers 16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.4.3.2
A PWM period is determined by the value written to the PWM counter modulo register.
The PWM counter is an up/down counter in a center-aligned operation. In this mode the PWM highest
output resolution is two bus clock cycles.
354
PWM period = (PWM modulus) (PWM clock period) 2
Period
PWM PERIOD = 8 x PWM CLOCK PERIOD
Because of the equals-comparator architecture of this PMF, the modulus
equals zero case is considered illegal. Therefore, the modulus register does
not return to zero, and a modulus value of zero will result in waveforms
inconsistent with the other modulus waveforms. If a modulus of zero is
loaded, the counter will continually count down from $7FFF. This operation
will not be tested or guaranteed. Consider it illegal. However, the dead-time
constraints and fault conditions will still be guaranteed.
ALIGNMENT REFERENCE
DUTY CYCLE = 50%
PWM OUTPUT
MODULUS = 4
UP COUNTER
PWM CLOCK PERIOD
UP/DOWN COUNTER
Figure 11-43. Center-Aligned PWM Period
Figure 11-42. Edge-Aligned PWM Output
MODULUS = 4
MC9S12E256 Data Sheet, Rev. 1.08
COUNT
NOTE
1
2
3
4
3
2
1
0
Freescale Semiconductor

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