kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 77

• Manufacturer Part Number: kfm2g16q2m-deb8
• Description: 2gb Muxonenand M-die
• Manufacturer: Samsung Semiconductor, Inc.

Interrupt (INT)
This is the master interrupt bit. The INT bit is wired directly to the INT pin on the chip. Upon writing '0' to the INT bit, the INT pin goes
low if INTpol is high and goes high if INTpol is low.
INT Interrupt [15]
Read Interrupt (RI)
This is the Read interrupt bit.
RI Interrupt [7]
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
2.8.22 Interrupt Status Register F241h (R/W)
This Read/Write register shows status of the MuxOneNAND interrupts.
In DDP, INT register will not be written if DFS is not set.
F241h, defaults = 8080h after Cold Reset; 8010h after Warm/Hot Reset
INT
15
sets itself to ’1’
sets itself to ’1’
clears to ’0’
clears to ’0’
Status
Status
14
13
One or more of RI, WI, RSTI and EI is set to ’1’,
command is written to Command Register in
command is written to Command Register in
Cold/Warm/Hot reset is being performed, or
or 0065h, 0023h, 0071h, 002Ah, 0027h and
Cold/Warm/Hot reset is being performed, or
At the completion of an Load Operation
(0000h, 000Eh, 000Ch, 000Ah, 0013h,
Load Data into Buffer, or boot is done)
Reserved(0000000)
12
002Ch commands are completed.
’0’ is written to this bit,
’0’ is written to this bit,
11
INT auto mode
INT auto mode
Conditions
Conditions
10
9
8
77
RI
7
Cold
Cold
1
1
Default State
Default State
WI
6
Warm/hot
Warm/hot
EI
5
1
0
RSTI
4
FLASH MEMORY
3
State
State
Valid
Valid
0
1
0
1
→
→
→
→
0
0
1
0
Reserved(0000)
1
0
2
Function
Interrupt
Function
1
Interrupt
Pending
Pending
off
off
off
off
0