kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 80

• Manufacturer Part Number: kfm2g16q2m-deb8
• Description: 2gb Muxonenand M-die
• Manufacturer: Samsung Semiconductor, Inc.

ECC Information[15:0]
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
2.8.26 ECC Status Register FF00h (R)
This Read register shows the Error Correction Status. The MuxOneNAND can detect 1- or 2-bit errors and correct 1-bit errors. 3-bit or
more error detection and correction is not supported.
ECC can be performed on the NAND Flash main and spare memory areas. The ECC status register can also show the number of
errors in a sector as a result of an ECC check in during a load operation. ECC status bits are also updated during a boot loading oper-
ation.
ECC registers will be reset when another command is issued.
FF00h, default = 0000h
Note 1) After Synchronous Block Burst Read operation, DQ[0] shows accmulated 1bit error.
Error Status
15
ERm3
ERm0
ERm1
ERm2
ERm3
ERs0
ERs1
ERs2
ERs3
Item
14
13
ERs3
2nd selected sector of
2nd selected sector of
1st selected sector of
3rd selected sector of
4th selected sector of
1st selected sector of
3rd selected sector of
4th selected sector of
the spare BufferRAM
the spare BufferRAM
the spare BufferRAM
the spare BufferRAM
the main BufferRAM
the main BufferRAM
the main BufferRAM
the main BufferRAM
12
ERm, ERs
Definition
00
01
10
11
11
ERm2
10
9
ERs2
Status of errors in the 2nd selected sector of the spare BufferRAM
Status of errors in the 3rd selected sector of the spare BufferRAM
Status of errors in the 4th selected sector of the spare BufferRAM
Status of errors in the 2nd selected sector of the main BufferRAM
Status of errors in the 1st selected sector of the spare BufferRAM
Status of errors in the 3rd selected sector of the main BufferRAM
Status of errors in the 1st selected sector of the main BufferRAM
Status of errors in the 4th selected sector of the main BufferRAM
8
80
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
7
ERm1
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
Also updated during a Bootload operation.
6
5
Description
2 bit error (uncorrectable)
1 bit error(correctable)
ERs1
ECC Status
4
Reserved
No Error
FLASH MEMORY
3
ERm0
2
1
ERs0
1)
0