h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 17
h5tq4g43mmr
Manufacturer Part Number
h5tq4g43mmr
Description
4gb Ddr3 Sdram Ddp
Manufacturer
Hynix Semiconductor
Datasheet
1.H5TQ4G43MMR.pdf
(73 pages)
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Rev. 0.1 /Aug 2008
5.2 AC and DC Logic Input Levels for Differential Signals
Note1.
Refer to “Overshoot and Undershoot Specification on page 25”
5.3 Differential Input Cross Point Voltage
To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe,
each cross point voltage of differential input signals (CK, CK and DQS, DQS) must meet the requirements
below table. The differential input cross point voltage VIX is measured from the actual cross point of true and
complement signal to the midlevel between of VDD and VSS.
Symbol
Symbol
VIHdiff
V
VILdiff
IX
Differential Input Cross Point
Voltage relative to VDD/2
Cross point voltage for differential input signals (CK, DQS)
Differential input logic high
Differential input logic low
Parameter
Parameter
V
IX
Vix Definition
V
IX
- 150
+ 0.200
Min
Min
DDR3-1066,
DDR3-1333
DDR3-1066,
DDR3-1333
V
IX
- 0.200
Max
-
Max
150
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
VDD
CK, DQS
VDD/2
CK, DQS
VSS
Unit
V
V
Unit Notes
mV
Notes
1
1
17
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