h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 45

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h5tq4g43mmr

Manufacturer Part Number
h5tq4g43mmr
Description
4gb Ddr3 Sdram Ddp
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 0.1 /Aug 2008
Table 9 - IDD5B Measurement-Loop Pattern
a) DM must be driven LOW all the time. DQS, DQS are FLOATING.
b) DQ signals are FLOATING.
0
1
2
0
1.2
3,4
5...8
9...12
13...16
17...20
21...24
25...28
29...32
33...nRFC-1
repeat cycles 1...4, but BA[2:0] = 1
repeat cycles 1...4, but BA[2:0] = 2
repeat cycles 1...4, but BA[2:0] = 3
repeat cycles 1...4, but BA[2:0] = 4
repeat cycles 1...4, but BA[2:0] = 5
repeat cycles 1...4, but BA[2:0] = 6
repeat cycles 1...4, but BA[2:0] = 7
repeat Sub-Loop 1, until nRFC - 1. Truncate, if necessary.
REF
D, D
D, D
0
1
1
a)
0
0
1
0
0
1
1
0
1
0
0
0
0
0
0
00
00
0
0
0
0
0
0
0
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
0
0
F
0
0
0
Data
-
-
-
45
b)

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