h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 72

• Manufacturer Part Number: h5tq4g43mmr
• Description: 4gb Ddr3 Sdram Ddp
• Manufacturer: Hynix Semiconductor

Rev. 0.1 /Aug 2008
Figure 10 - Illustration of tangent line for hold time t
(for ADD/CMD with respect to clock).
Note: Clock and Strobe are drawn
Hold Slew Rate
Rising Signal
on a different time scale.
V
V
V
V
V
V
IL(dc)
IL(ac)
IH(ac)
IH(dc)
REF(dc)
DDQ
DQS
DQS
CK
CK
max
max
min
min
V
SS
=
dc to V
dc to V
region
region
tangent line [V
REF
REF
Hold Slew Rate
Falling Signal
∆TR
tDS
tIS
tangent
REF(dc)
line
tDH
tIH
- V
DH
=
IL(dc)
(for DQ with respect to strobe) and t
∆TR
tangent line [V
max]
nominal
line
tIS
IH(dc)
tangent
tDS
∆TF
line
min - V
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
tIH
tDH
∆TF
nominal
REF(dc)
line
IH
]
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