h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 64

• Manufacturer Part Number: h5tq4g43mmr
• Description: 4gb Ddr3 Sdram Ddp
• Manufacturer: Hynix Semiconductor

Rev. 0.1 /Aug 2008
Figure 4 - Illustration of nominal slew rate for hold time t
(for ADD/CMD with respect to clock).
Note: Clock and Strobe are drawn
Hold Slew Rate
Rising Signal
on a different time scale.
V
V
V
V
V
V
IL(dc)
IL(ac)
REF(dc)
DDQ
IH(ac)
IH(dc)
DQS
DQS
CK
CK
max
max
V
min
min
SS
=
dc to V
region
V
REF(dc)
REF
∆TR
- V
slew rate
nominal
tDS
IL(dc)
tIS
max
tDH
tIH
Hold Slew Rate
Falling Signal
∆
DH
TR
(for DQ with respect to strobe) and t
dc to V
region
slew rate
nominal
tIS
=
tDS
V
REF
IH(dc)
tIH
tDH
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
min - V
∆
∆TF
TF
REF(dc)
IH
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