h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 178

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

Idle Cycle in Case of DRAM Space Access after Normal Space Access: In a DRAM space
access following a normal space access, the settings of bits IDLE1, IDLE0, IDLC1, and IDLC0 in
BCR are valid. However, in the case of consecutive reads in different areas, for example, if the
second read is a full access to DRAM space, idle cycles include T
and T
cycles. The timing when
p
i
a four-state idle cycle is inserted in a full access to DRAM space is shown in figure 6.48.
External read
DRAM space read
T
T
T
T
T
T
T
T
T
1
2
3
p
r
i
i
c1
c2
φ
Address bus
Data bus
Figure 6.48 Example of DRAM Full Access after External Read (CAST = 0)
In burst access in RAS down mode, the settings of bits IDLE1, IDLE0, IDLC1, and IDLC0 are
valid and an idle cycle is inserted. The timing in this case is illustrated in figure 6.49.
Rev. 2.00, 03/04, page 146 of 534