C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 172

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C505_9708

Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Interrupt System
C505 / C505C
7
Interrupt System
The C505 provides 12 interrupt vectors with four priority levels. Five interrupt requests can be
generated by the on-chip peripherals (timer 0, timer 1, timer 2, serial interface, A/D converter). One
interrupt can be generated by the CAN controller (C505C only) or by a software setting and in this
case the interrupt vector is the same. Six interrupts may be triggered externally (P3.2/INT0, P3.3/
INT1, P1.0/AN0/INT3/CC0, P1.1/AN1/INT4/CC1, P1.2/AN2/INT5/CC2, P1.3/AN3/INT6/CC3).
Additionally, the P1.5/AN5/T2EX can trigger an interrupt. The wake-up from power-down mode
interrupt has a special functionality which allows to exit from the software power-down mode by a
short low pulse at either pin P3.2/INT0 or the pin P4.1/RXDC (please refer to chapter 9 for further
details).
The four external interrupts (INT3, INT4, INT5 and INT6) can also be generated by the timer 2 in
capture/compare mode.
This chapter shows the interrupt structure, the interrupt vectors and the interrupt related special
function registers. Figure 7-1 to 7-3 give a general overview of the interrupt sources and illustrate
the request and the control flags which are described in the next sections.
Semiconductor Group
7-1
1997-08-01

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