C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 26
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
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3.4.2
The XRAM and CAN controller can be accessed by two read/write instructions, which use the 16-bit
DPTR for indirect addressing. These instructions are :
For accessing the XRAM, the effective address stored in DPTR must be in the range of FF00 H to
FFFF H . For accessing the CAN controller, the effective address stored in DPTR must be in the
range of F700 H to F7FF H .
3.4.3 Accesses to XRAM using the Registers R0/R1 (8-bit Addressing Mode)
The 8051 architecture provides also instructions for accesses to external data memory range which
use only an 8-bit address (indirect addressing with registers R0 or R1). The instructions are:
Aspecial page register is implemented in the C505 to provide the possibility of accessing the XRAM
or CAN controller also with the MOVX @Ri instructions, i.e. XPAGE serves the same function for
the XRAM and CAN controller as Port 2 for external data memory.
Special Function Register XPAGE (Address 91 H )
Bit
XPAGE.7-0
Figures 3-2 to 3-4 show the dependencies of XPAGE- and Port 2 - addressing in order to explain
the differences in accessing XRAM/CAN controller, ext. RAM or what is to do when Port 2 is used
as an I/O-port.
Semiconductor Group
– MOVX
– MOVX
91 H
Accesses to XRAM using the DPTR (16-bit Addressing Mode)
Bit No. MSB
MOVX
MOVX
A, @DPTR
@DPTR, A
7
.7
A, @Ri
@Ri, A
Function
XRAM/CAN controller high address
XPAGE.7-0 is the address part A15-A8 when 8-bit MOVX instructions are
used to access internal XRAM or CAN controller.
6
.6
(Read)
(Write)
(Read)
(Write)
.5
5
.4
4
3-5
.3
3
.2
2
.1
Memory Organization
1
LSB
.0
0
Reset Value : 00 H
C505 / C505C
XPAGE
1997-08-01
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