C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 65
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
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6.1.2 Standard I/O Port Circuitry
Figure 6-1 shows a functional diagram of a typical bit latch and I/O buffer, which is the core of each
of the five I/O-ports. The bit latch (one bit in the port’s SFR) is represented as a type-D flip-flop,
which will clock in a value from the internal bus in response to a "write-to-latch" signal from the CPU.
The Q output of the flip-flop is placed on the internal bus in response to a "read-latch" signal from
the CPU. The level of the port pin itself is placed on the internal bus in response to a "read-pin"
signal from the CPU. Some instructions that read from a port (i.e. from the corresponding port SFR
P0 to P4) activate the "read-latch" signal, while others activate the "read-pin" signal.
Figure 6-1
Basic Structure of a Port Circuitry
Semiconductor Group
Int. Bus
Latch
Latch
Read
Write
Read
to
Pin
D
CLK
Port
Latch
6-3
Q
Q
On-Chip Peripheral Components
Port
Driver
Circuit
MCS01822
Port
Pin
C505 / C505C
1997-08-01
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