C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 72
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
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The described activating and deactivating of the four different transistors translates into four states
the pins can be:
If a pin is used as input and a low level is applied, it will be in IL state, if a high level is applied, it will
switch to IH state.
If the latch is loaded with "0", the pin will be in OL state.
If the latch holds a "0" and is loaded with "1", the pin will enter FOH state for two cycles and then
switch to SOH state. If the latch holds a "1" and is reloaded with a "1" no state change will occur.
At the beginning of power-on reset the pins will be in IL state (latch is set to "1", voltage level on pin
is below of the trip point of p3). Depending on the voltage level and load applied to the pin, it will
remain in this state or will switch to IH (=SOH) state.
If it is used as output, the weak pull-up p2 will pull the voltage level at the pin above p3’s trip point
after some time and p3 will turn on and provide a strong "1". Note, however, that if the load exceeds
the drive capability of p2 (
first 0-to-1 transition on the latch occurs. Until this the output level might stay below the trip point of
the external circuitry.
The same is true if a pin is used as bidirectional line and the external circuitry is switched from
output to input when the pin is held at "0" and the load then exceeds the p2 drive capabilities.
If the load exceeds
Semiconductor Group
– The pullup FET p3 is of p-channel type. It is only activated if the voltage at the port pin is
–
–
–
–
higher than approximately 1.0 to 1.5 V. This provides an additional pullup current if a logic
high level shall be output at the pin (and the voltage is not forced lower than approximately
1.0 to 1.5 V). However, this transistor is turned off if the pin is driven to a logic low level, e.g
when used as input. In this configuration only the weak pullup FET p2 is active, which sources
the current
(
with a low level applied. However, the driving capability is stronger if a logic high level is
output.
I
TL
input low state (IL), p2 active only
input high state (IH) = steady output high state (SOH) p2 and p3 active
forced output high state (FOH), p1, p2 and p3 active
output low state (OL), n1 active
). Thus, an additional power consumption can be avoided if port pins are used as inputs
I
IL
I
. If, in addition, the pullup FET p3 is activated, a higher current can be sourced
IL
the pin can be forced to "1" by writing a "0" followed by a "1" to the port pin.
I
IL
), the pin might remain in the IL state and provide a week "1" until the
6-10
On-Chip Peripheral Components
C505 / C505C
1997-08-01
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