C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 203

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C505_9708

Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
9.4.2 Exit from Software Power Down Mode
If power down mode is exit via a hardware reset, the microcontroller with its SFRs is put into the
hardware reset state and the content of RAM and XRAM are not changed. The reset signal that
terminates the power down mode also restarts the RC oscillator and the on-chip oscillatror. The
reset operation should not be activated before
must be held active long enough to allow the oscillator to restart and stabilize (similar to power-on
reset).
Figure 9-1 shows the procedure which must is executed when power down mode is left via the
P3.2/INT0 or the P4.1/RXDC wake-up capability.
Figure 9-1
Wake-up from Power Down Mode Procedure
When the power down mode wake-up capability has been enabled (bit EWPD in SFR PCON1 set)
prior to entering power down mode and bit WS in SFR PCON1 is cleared, the power down mode
can be exit via INT0 while executing the following procedure :
1. In power down mode pin P3.2/INT0 must be held at high level.
2. Power down mode is left when P3.2/INT0 goes low for at least 10 s (latch phase). After this
Semiconductor Group
P3.2 / INT0
P4.1 / RXDC
ALE
PSEN
P2
P0
Detailed Timing of Beginning of Phase 4
delay the internal RC oscillator and the on-chip oscillator are started, the state of pin P3.2/INT0
is internally latched, and P3.2/INT0 can be set again to high level if required. Thereafter, the
oscillator watchdog unit controls the wake-up procedure in its start-up phase.
or
Power Down
Mode
1)
Phase
Latch
10 s
min.
2)
Invalid Address / Data
Invalid Address
Oscillator Start-Up Phase
9-7
V
Watchdog Circuit
CC
typ. 5 ms
is restored to its normal operating level and
3)
Power Saving Modes
Execution of
at 007B
interrupt
1 st instr.
of ISR
4)
Insruction
7BH
H
C505 / C505C
RETI
00H
1997-08-01
MCT03309

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