C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 190
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
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8.1.1 Input Clock Selection
The input clock rate of the watchdog timer is derived from the system clock of the C505. There is a
prescaler available, which is software selectable and defines the input clock rate. This prescaler is
controlled by bit WDTPSEL in the SFR WDTREL. Tabel 8-1 shows resulting timeout periods at
= 12 and 16 MHz.
Special Function Register WDTREL (Address 86 H )
Bit
WDTPSEL
WDTREL.6 - 0
Table 8-1
Watchdog Timer Time-Out Periods
WDTREL
00 H
80 H
7F H
Semiconductor Group
Bit No.
86 H
PSEL
MSB
WDT
f
32.768 ms
524.2 ms
256 s
OSC
7
= 12 MHz
Function
Watchdog timer prescaler select bit.
When set, the watchdog timer is clocked through an additional divide-by-
16 prescaler .
Seven bit reload value
for the high-byte of the watchdog timer. This value is loaded to WDTH
when a refresh is triggered by a consecutive setting of bits WDT and
SWDT.
Time-Out Period
6
f
24.576 ms
393.2 ms
192 s
5
OSC
= 16 MHz
4
Reload Value
8-2
3
Comments
This is the default value
Maximum time period
Minimum time period
2
Fail Save Mechanisms
1
LSB
0
Reset Value : 00 H
C505 / C505C
WDTREL
1997-08-01
f
OSC
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