Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 157
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Z8L180
Manufacturer Part Number
Z8L180
Description
Z8018x Family MPU
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8L180.pdf
(326 pages)
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142
UM005001-ZMP0400
PS
0
Prescaler
Z 8018x Fam il y
M PU Us e r M anual
Divide
Ratio
10
DR Rate
0
1
Sampling
Rate
16
64
Table 19. ASCI Baud Rate Selection
SS2 SS1 SS0 Divide
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Baud Rate
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Ratio
16
32
64
—
16
32
64
—
1
2
4
8
1
2
4
8
General
Divide
Ratio
fc
fc
0 640
10240
10240
20480
40960
1280
2560
5120
1280
2560
5120
160
320
640
16
64
MHz
= 6.144
38400
19200
Baud Rate (Example)
9600
4800
2400
1200
9600
4800
2400
1200
600
600
300
150
—
—
MHz
(BPS)
= 4.608
—
—
MHz
= 3.072
19200
9600
4800
2400
1200
4800
2400
1200
600
300
600
300
150
—
75
—
I/O
0
0
I
I
CKA
Clock
Frequency
160
320
640
160
320
640
10
20
40
80
10
20
40
80
fc
fc
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