Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 57
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Z8L180
Manufacturer Part Number
Z8L180
Description
Z8018x Family MPU
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8L180.pdf
(326 pages)
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42
I/O Control Register (ICR: 3FH)
UM005001-ZMP0400
Bit
Bit/Field
R/W
Reset
R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Position
7
5
–
Z 8018x Fam il y
M PU Us e r M anual
6
Bit/Field R/W
IOA7:6
IOSTP
IOA7
R/W
7
To avoid address conflicts with external I/O, the Z8X180 internal I/O
addresses can be relocated on 64-byte boundaries within the bottom 256
bytes of the 64KB I/O address space.
I/O Control Register (ICR)
ICR allows relocating of the internal I/O addresses. ICR also controls
enabling/disabling of the IOSTOP mode.
0
R/W
R/W
IOA6
R/W
6
0
Value
IOSTP
R/W
5
0
Description
IOA7 and IOA6 relocate internal I/O as depicted in
Figure . The high-order 8 bits of 16-bit internal I/O
addresses are always 0. IOA7 and IOA6 are cleared to 0
during RESET.
IOSTOP mode is enabled when IOSTP is set to 1.
Normal. I/O operation resumes when IOSTP is reset to 0.
—
4
—
3
—
2
—
1
—
0
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