Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 303

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

Status Signals
PIN OUTPUTS IN EACH OPERATING MODE
Table 55. Pin Outputs in Each Operating Mode
Mode
CPU
Operation
Refresh
Interrupt
Acknowledge
Cycle
(1st Machine
Cycle)
BUS RELEASE
HALT
SLEEP
Op Code Fetch
(1st Op Code)
Op Code Fetch
(except 1 st Op
Code)
MemRead
Memory Write
I/O Read
I/O Write
Internal
Operation
NMI
INT0
INT1, INT2 &
Internal
Interrupts
Table 55 describes pin outputs in each operating mode.
M1 MREQ IORQ RD WR RFSH HALT BUSACK ST
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
0
0
0
1
1
1
0
0
1
1
Z
0
1
1
1
1
1
0
0
1
1
1
0
1
Z
1
1
0
0
0
1
0
1
1
1
0
1
1
Z
0
1
1
1
1
0
1
0
1
1
1
1
1
Z
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
0
1
1
MPU User Manual
UM005001-ZMP0400
Z8018x Family
0
1
1
1
1
1
1
*
0
0
0
*
0
1
Address
BUS
A
A
A
A
A
A
A
A
A
A
A
Z
A
1
Data
BUS
IN
IN
IN
OUT
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
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