Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 315

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

Register
DMA Memory Address
Register
Channel 1B:
DMA I/O Address Register
Channel 1L:
DMA I/O Address Register
Channel 1H
DMA Byte Count Register
Channel 1L:
DMA Byte Count Register
Channel 1H:
DMA Status Register:
DMA Mode Register:
Table 57. Internal I/O Registers (Continued)
MAR1B
IAR1L
IAR1H
BCR1L
BCR1H
DSTAT
DMODE
Mnemonics Address
2
2
2
2
2
3
3
A
B
C
E
F
0
1
Bits 0 - 2 are used for MAR1B
during RESET
during RESET
DM1,0
MMOD
0 0
0 1
1 0
1 1
R/W
R/W
bit
bit
0
1
Destination
Mode
Burst Mode
Cycle Steal Mode
DE1
1
0
—
R/W
I/O
M
M
M
R/W
—
1
DE0
0
DMA enable ch 1,0
DAR0+1
DAR0-1
DAR0 fixed
DAR0 fixed
Address
DWE1
DM1
R/W
Remarks
0
1
W
MPU User Manual
DWE0
DM0
Ch 0 Destination Mode 1,0
0
R/W
1
DMA Enable Bit Write Enable 1,0
W
UM005001-ZMP0400
SM1,0
Z8018x Family
0 0
0 1
1 0
1 1
SM1
DIE1
R/W
R/W
0
0
SM0
DIE0
Ch 0 Source Mode 1,0
R/W
R/W
DMA Interrupt Enable 1,0
Source
0
0
I/O
M
M
M
MMOD
R/W
—
0
1
Memory MODE select
SAR0+1
SAR0-1
SAR0 fixed
SAR0 fixed
Address
DME
—
1
0
R
DMA Master enable
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