Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 311

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

Register
ASCI Status Channel 0:
ASCI Status Channel 1:
Table 57. Internal I/O Registers (Continued)
STAT0
STAT1
Mnemonics Address
0
0
5
4
during RESET
during RESET
* DCD
R/W
R/W
bit
bit
0
: Depending on the condition of DCD
RDRF
RDRF
0
0
R
R
Receive Data Register Full
Receive Data Register Full
OVRN
OVRN
0
R
0
R
Overrun Error
Overrun Error
Remarks
PE
PE
0
R
0
R
Parity Error
Parity Error
MPU User Manual
0
Pin.
FE
FE
UM005001-ZMP0400
0
R
0
R
Framing Error
Framing Error
Z8018x Family
invalid
0
R/W
R/W
RIE
RIE
Receive Interrupt Enable
Receive Interrupt Enable
CTS1E TDRE
DCD0
*
0
R
R
Data Carrier Detect
CTS1 Enable
TDRE
** CTS
**
1
R
R
Transmit Data Register Empty
Transmit Data Register Empty
H
L
0
R/W
R/W
Transmit Interrupt Enable
Transmit Interrupt Enable
TIE
Pin
TIE
0
0
TDRE
0
1
295