HYB18L256160B QIMONDA [Qimonda AG], HYB18L256160B Datasheet - Page 9

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HYB18L256160B

Manufacturer Part Number
HYB18L256160B
Description
DRAMs for Mobile Applications 256-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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2.2
2.2.1
The Mode Register is used to define the specific mode of operation of the Mobile-RAM. This definition includes the selection
of a burst length (bits A0-A2), a burst type (bit A3), a CAS latency (bits A4-A6), and a write burst mode (bit A9). The Mode
Register is programmed via the MODE REGISTER SET command (with BA0 = 0 and BA1 = 0) and will retain the stored
information until it is programmed again or the device loses power.
The Mode Register must be loaded when all banks are idle, and the controller must wait the specified time before initiating any
subsequent operation. Violating either of these requirements results in unspecified operation.
Reserved states should not be used, as unknown operation or incompatibility with future versions may result.
Rev. 1.73, 2006-09
01302004-CZ2R-J9SE
Field
WB
CL
BT
BL
Bits
9
[6:4]
3
[2:0]
Type
w
w
w
w
Register Definition
Mode Register
Description
Write Burst Mode
0
1
CAS Latency
010
011
Note: All other bit combinations are RESERVED.
Burst Type
0
1
Burst Length
000
001
010
011
111
Note: All other bit combinations are RESERVED.
B
B
B
B
B
B
B
B
B
B
B
Burst Write
Single Write
2
3
Sequential
Interleaved
1
2
4
8
full page (Sequential burst type only)
9
Mode Register Definition (BA[1:0] = 00
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
TABLE 5
Data Sheet
B
)

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