Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 137

• Manufacturer Part Number: Z8F082A28100KIT
• Description: Z8 Encore XP-R F08xA Series with eXtended Peripherals
• Manufacturer: ZILOG [Zilog, Inc.]

BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
ADC Control/Status Register 1
REFSELH ALMHST
R/W
1
7
The second ADC Control register configures the input buffer stage, enables the threshold
interrupts and contains the status of both threshold triggers.
REFSELH—Voltage Reference Level Select High Bit; in conjunction with the Low bit
(REFSELL) in
erence; the following details the effects of {REFSELH, REFSELL}; this reference is inde-
pendent of the Comparator reference
00= Internal Reference Disabled, reference comes from external pin
01= Internal Reference set to 1.0 V
10= Internal Reference set to 2.0 V (default)
11= Reserved
ALMHST—Alarm High Status; this bit can only be set by hardware and must be written
with a 1 to clear
0= No alarm occurred.
1= A high threshold alarm occurred.
ALMLST—Alarm Low Status; this bit can only be set by hardware and must be written
with a 1 to clear
0= No alarm occurred.
1= A low threshold alarm occurred.
ALMHEN—Alarm High Enable
0= Alarm interrupt for high threshold is disabled. The alarm status bit remains set when
the alarm threshold is passed.
1= High threshold alarm interrupt is enabled.
ALMLEN—Alarm Low Enable
0= Alarm interrupt for low threshold is disabled. The alarm status bit remains set when the
alarm threshold is passed.
1= Low threshold alarm interrupt is enabled.
BUFMODE[2:0]
000 = Single-ended, unbuffered input
001 = Single-ended, buffered input with unity gain
010 = Reserved
011 = Reserved
Table 71. ADC Control/Status Register 1 (ADCCTL1)
R/W
6
0
ADC Control Register 0
-
Input Buffer Mode Select
ALMLST
R/W
5
0
P R E L I M I N A R Y
ALMHEN
R/W
0
4
, this determines the level of the internal voltage ref-
F71H
ALMLEN
R/W
3
0
Z8 Encore! XP
R/W
0
2
Product Specification
BUFMODE[2:0]
Analog-to-Digital Converter
R/W
1
0
®
F08xA Series
R/W
0
0
119