Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 70

• Manufacturer Part Number: Z8F082A28100KIT
• Description: Z8 Encore XP-R F08xA Series with eXtended Peripherals
• Manufacturer: ZILOG [Zilog, Inc.]

BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
Interrupt Request 2 Register
PA7VI
R/W
R/W
0
0
7
7
PA7VI—Port A7 or LVD Interrupt Request
0 = No interrupt request is pending for GPIO Port A or LVD.
1 = An interrupt request from GPIO Port A or LVD.
PA6CI—Port A6 or Comparator Interrupt Request
0 = No interrupt request is pending for GPIO Port A or Comparator.
1 = An interrupt request from GPIO Port A or Comparator.
PAxI—Port A Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port A pin x.
1 = An interrupt request from GPIO Port A pin x is awaiting service.
where x indicates the specific GPIO Port pin number (0–5).
The Interrupt Request 2 (IRQ2) register (Table 34) stores interrupt requests for both vec-
tored and polled interrupts. When a request is presented to the interrupt controller, the cor-
responding bit in the IRQ2 register becomes 1. If interrupts are globally enabled (vectored
interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If interrupts
are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt Request 2
register to determine if any interrupt requests are pending.
Reserved—Must be 0.
PCxI—Port C Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port C pin x.
1 = An interrupt request from GPIO Port C pin x is awaiting service.
where x indicates the specific GPIO Port C pin number (0–3).
PA6CI
R/W
R/W
6
0
6
0
Table 33. Interrupt Request 1 Register (IRQ1)
Table 34. Interrupt Request 2 Register (IRQ2)
Reserved
PA5I
R/W
R/W
5
0
5
0
P R E L I M I N A R Y
PA4I
R/W
R/W
0
0
4
4
FC3H
FC6H
PC3I
PA3I
R/W
R/W
3
0
3
0
Z8 Encore! XP
PC2I
PA2I
R/W
R/W
0
0
2
2
Product Specification
PC1I
PA1I
R/W
R/W
1
0
1
0
®
Interrupt Controller
F08xA Series
PC0I
PA0I
R/W
R/W
0
0
0
0
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