Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 69

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Z8F082A28100KIT

Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
Interrupt Request 1 Register
Reserved
R/W
0
7
Reserved—Must be 0.
T1I—Timer 1 Interrupt Request
0 = No interrupt request is pending for Timer 1.
1 = An interrupt request from Timer 1 is awaiting service.
T0I—Timer 0 Interrupt Request
0 = No interrupt request is pending for Timer 0.
1 = An interrupt request from Timer 0 is awaiting service.
U0RXI—UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service.
U0TXI—UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service.
ADCI—ADC Interrupt Request
0 = No interrupt request is pending for the Analog-to-Digital Converter.
1 = An interrupt request from the Analog-to-Digital Converter is awaiting service.
The Interrupt Request 1 (IRQ1) register (Table 33) stores interrupt requests for both vec-
tored and polled interrupts. When a request is presented to the interrupt controller, the cor-
responding bit in the IRQ1 register becomes 1. If interrupts are globally enabled (vectored
interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If interrupts
are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt Request 1
register to determine if any interrupt requests are pending.
R/W
T1I
6
0
Table 32. Interrupt Request 0 Register (IRQ0)
R/W
T0I
5
0
P R E L I M I N A R Y
U0RXI
R/W
0
4
FC0H
U0TXI
R/W
3
0
Z8 Encore! XP
Reserved Reserved
R/W
0
2
Product Specification
R/W
1
0
®
Interrupt Controller
F08xA Series
ADCI
R/W
0
0
51

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