Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 75

• Manufacturer Part Number: Z8F082A28100KIT
• Description: Z8 Encore XP-R F08xA Series with eXtended Peripherals
• Manufacturer: ZILOG [Zilog, Inc.]

BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
Interrupt Control Register
Reserved
IRQE
R/W
R/W
0
0
7
7
Because these shared interrupts are edge-triggered, it is possible to generate an interrupt
just by switching from one shared source to another. For this reason, an interrupt must be
disabled before switching between sources.
PA6CS—PA6/Comparator Selection
0 = PA6 is used for the interrupt for PA6CS interrupt request.
1 = The Comparator is used for the interrupt for PA6CS interrupt request.
Reserved—Must be 0.
The Interrupt Control (IRQCTL) register (Table 46) contains the master enable bit for all
interrupts.
IRQE—Interrupt Request Enable
This bit is set to 1 by executing an EI (Enable Interrupts) or IRET (Interrupt Return)
instruction, or by a direct register write of a 1 to this bit. It is reset to 0 by executing a DI
instruction, eZ8 CPU acknowledgement of an interrupt request, Reset or by a direct regis-
ter write of a 0 to this bit.
0 = Interrupts are disabled.
1 = Interrupts are enabled.
Reserved—Must be 0.
PA6CS
Table 45. Shared Interrupt Select Register (IRQSS)
R/W
R
6
0
6
0
Table 46. Interrupt Control Register (IRQCTL)
R/W
R
5
0
5
0
P R E L I M I N A R Y
R/W
R
0
0
4
4
FCEH
FCFH
Reserved
R/W
R
3
0
3
0
Reserved
Z8 Encore! XP
R/W
R
0
0
2
2
Product Specification
R/W
R
1
0
1
0
®
Interrupt Controller
F08xA Series
R/W
R
0
0
0
0
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