Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 56

• Manufacturer Part Number: Z8F082A28100KIT
• Description: Z8 Encore XP-R F08xA Series with eXtended Peripherals
• Manufacturer: ZILOG [Zilog, Inc.]

BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
PADDR[7:0]
09H–FFH
00H
01H
02H
03H
04H
05H
06H
07H
08H
Port A–D Control Registers
Port A–D Data Direction Sub-Registers
R/W
7
PADDR[7:0]—Port Address
The Port Address selects one of the sub-registers accessible through the Port Control reg-
ister.
The Port A–D Control registers set the GPIO port operation. The value in the correspond-
ing Port A–D Address register determines which sub-register is read from or written to by
a Port A–D Control register transaction (Table 17).
PCTL[7:0]—Port Control
The Port Control register provides access to all sub-registers that configure the GPIO Port
operation.
The Port A–D Data Direction sub-register is accessed through the Port A–D Control regis-
ter by writing 01H to the Port A–D Address register (Table 18).
Port Control sub-register accessible using the Port A–D Control Registers
No function. Provides some protection against accidental Port reconfiguration.
Data Direction
Alternate Function
Output Control (Open-Drain)
High Drive Enable
STOP Mode Recovery Source Enable.
Pull-up Enable
Alternate Function Set 1
Alternate Function Set 2
No function
R/W
6
Table 17. Port A–D Control Registers (PxCTL)
R/W
5
P R E L I M I N A R Y
FD1H, FD5H, FD9H, FDDH
R/W
4
PCTL
00H
R/W
3
Z8 Encore! XP
R/W
2
Product Specification
R/W
General-Purpose I/O
1
®
F08xA Series
R/W
0
38