Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 145
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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PS024604-1005
If the CPU is in HALT or operational mode, the LIN-UART (if enabled) times the duration
of the Wake-up and provides an interrupt following the end of the break sequence if the
duration is ≥ 3 bit times. The total duration of the Wake-up message in bit times may be
obtained by reading the
up message has been detected, the LIN-UART can be placed (by software) into either LIN
Master or LIN Slave Wait for Break states as appropriate. If the break duration exceeds 15
bit times, the
the Wake-up message can be detected via a port pin interrupt and timed by software. If the
device is in STOP mode, the high to low transition on the port pin will bring the device out
of STOP mode.
The LIN Sleep state is selected by software setting
move from an active state to sleep state is based on the LIN messages as interpreted by
software.
LIN Slave Operation
LIN Slave mode is selected by setting
State
sage by the Break which appears to the Slave as a break of at least 11 bit times in duration.
The LIN-UART detects the Break and generates an interrupt to the CPU. The duration of
the Break is observable in the
of less than 11 bit times in duration does not generate a break interrupt when the LIN-
UART is in Wait for Break state. If the Break duration exceeds 15 bit times, the
Length
Following the Break the LIN-UART hardware automatically transitions to the Autobaud
state, where it autobauds by timing the duration of the first 8 bit times of the Synch charac-
ter as defined in the standard. At the end of the autobaud period, the duration measured by
the BRG counter (auto baud period divided by 8) is automatically transferred to the Baud
Reload High and Low registers if the
BRG Counter overflows before reaching the start of bit 7 in the autobaud sequence the
Autobaud Overrun Error interrupt occurs, the
Baud Reload registers are not updated. To autobaud within 2% of the master’s baud rate,
the slave system clock must be a minimum of 100 times the baud rate. To avoid an auto-
baud overrun error, the system clock must not be greater than 2
bit counter following 3-bit prescaler when counting the 8 bit times of the Autobaud
sequence).
Following the Synch character, the LIN-UART hardware transitions to the Active state
where the Identifier character is received and the characters of the Response section of the
message are sent or received. The Slave remains in the Active state until a Break is
received or software forces a state change. Once in Active State (autobaud has completed),
a Break of 10 or more bit times is recognized and will cause a transition to the Autobaud
state.
[1:0] =
field contains the value
RxBreakLength
01b
(Wait for Break State). The LIN slave detects the start of a new mes-
RxBreakLength
P R E L I M I N A R Y
RxBreakLength
field contains the value
Fh
.
ABEN
LMST
field in the Mode Status register. After a Wake-
bit of the LIN control register is set. If the
= 0,
OE
field of the Mode Status register. A Break
LSLV
bit in the Status0 register is set and the
LinState
= 1,
Fh
. If the LIN-UART is disabled,
ABEN
[1:0] = 00. The decision to
19
Product Specification
= 1 or 0 and
times the baud rate (16
LIN Protocol Mode
Lin-
RxBreak-
123
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