Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 317

• Manufacturer Part Number: Z8FMC04100
• Description: Z8 Encore-R Motor Control Flash MCUs
• Manufacturer: ZILOG [Zilog, Inc.]

PS024604-1005
Assembly
Mnemonic
TMX dst, src
TRAP Vector
WDT
XOR dst, src
XORX dst, src
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = unaffected.
X = undefined.
0 = reset to 0.
1 = set to 1.
Flags Register
The Flags Register contains the status information regarding the most recent arithmetic,
logical, bit manipulation or rotate and shift operation. The Flags Register contains six bits
of status information that are set or cleared by CPU operations. Four of the bits (C, V, Z,
and S) can be tested for use with conditional jump instructions. Two flags (H and D) can-
not be tested and are used for Binary-Coded Decimal (BCD) arithmetic.
The two remaining bits, User Flags (F1 and F2), are available as general-purpose status
bits. User Flags are unaffected by arithmetic operations and must be set or cleared by
instructions. The User Flags cannot be used with conditional Jumps. They are undefined at
dst AND src
Symbolic Operation
SP
@SP
SP
@SP
PC
dst
dst
←
←
←
←
←
←
←
Table 165. eZ8 CPU Instruction Summary (Continued)
SP – 2
SP – 1
dst XOR src
dst XOR src
@Vector
PC
FLAGS
Address
dst src
ER ER
ER
ER ER
ER
IR
R
R
R
r
r
Mode
P R E L I M I N A R Y
Vect
IM
IM
IM
IM
IR
or
R
Ir
r
Code(s)
(Hex)
Op
78
79
F2
5F
B2
B3
B4
B5
B6
B7
B8
B9
— *
— — — — — —
— — — — — —
— *
— *
C Z
Flags
S V D H
*
*
*
0 — —
0 — —
0 — —
Product Specification
eZ8 CPU Instruction Set
Cycles
Fetch
4
4
2
1
2
2
3
3
3
3
4
4
Cycles
Instr.
3
3
6
2
3
4
3
4
3
4
3
3
295