Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 159
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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Z8FMC16100 Series Flash MCU
Product Specification
137
11 = The LIN-UART generates an interrupt request on all received data bytes for which
the most recent address byte matched the value in the Address Compare Register.
MPEN—MULTIPROCESSOR (9-bit) Enable
This bit is used to enable MULTIPROCESSOR (9-bit) mode.
0 = Disable Multiprocessor (9-bit) mode.
1 = Enable Multiprocessor (9-bit) mode.
MPBT—Multiprocessor Bit Transmit
This bit is applicable only when Multiprocessor (9-bit) mode is enabled.
0 = Send a 0 in the multiprocessor bit location of the data stream (9th bit).
1 = Send a 1 in the multiprocessor bit location of the data stream (9th bit).
DEPOL—Driver Enable Polarity
0 = DE signal is Active High.
1 = DE signal is Active Low.
BRGCTL—Baud Rate Generator Control
This bit causes different LIN-UART behavior depending on whether the LIN-UART
receiver is enabled (
= 1 in the LIN-UART Control 0 Register).
REN
When the LIN-UART receiver is not enabled, this bit determines whether the Baud Rate
Generator issues interrupts.
0 = BRG is disabled. Reads from the Baud Rate High and Low Byte registers return the
BRG Reload Value
1 = BRG is enabled and counting. The Baud Rate Generator generates a receive interrupt
when it counts down to 0. Reads from the Baud Rate High and Low Byte registers return
the current BRG count value.
When the LIN-UART receiver is enabled, this bit allows reads from the Baud Rate Regis-
ters to return the BRG count value instead of the Reload Value.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value.
1 = Reads from the Baud Rate High and Low Byte registers return the current BRG count
value. Unlike the Timers, there is no mechanism to latch the High Byte when the Low
Byte is read.
RDAIRQ—Receive Data Interrupt Enable
0 = Received data and receiver errors generates an interrupt request to the Interrupt Con-
troller.
1 = Received data does not generate an interrupt request to the Interrupt Controller. Only
receiver errors generate an interrupt request.
IREN—Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. LIN-UART operates normally.
1 = Infrared Encoder/Decoder is enabled. The LIN-UART transmits and receives data
through the Infrared Encoder/Decoder.
PS024604-1005
P R E L I M I N A R Y
LIN-UART Control 1 Registers
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