Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 61

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Z8FMC04100

Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet

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PS024604-1005
Port
Port B
Port C
GPIO Interrupts
GPIO Control Register Definitions
Pin
PB2
PB1
PB0
PC0
Many of the GPIO port pins can be used as interrupt sources. The Port A[7:0] pins can be
configured to generate an interrupt request on either the rising edge or falling edge of the
pin input signal. The Port B[3:0] pins can be configured to generate an interrupt request on
both the rising and falling edges of the pin input signal. For Port A, the GPIO interrupt
edge selection is controlled by the Interrupt Edge Select subregister. Enabling and dis-
abling of the Port Interrupts is handled in the Interrupt Controller. Port B[3:0], with dual
edge interrupt capability, is selected by AF1, AF0. Refer to the
ter on page 51 for more information.
Four registers for each Port provide access to GPIO control, input data, and output data.
Table 14 lists these Port registers. Use the Port A–C Address and Control registers
together to provide access to subregisters for Port configuration and control.
Mnemonic
PB2
PB2INT
ANA2
T0IN2
PB1
PB1INT
ANA1
PB0
PB0INT
ANA0
PC0
T0OUT
Table 13. Port Alternate Function Mapping (Continued)
AF0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
P R E L I M I N A R Y
AF1 Alternate Function Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GPIO/Timer 0 input 2.
GPIO/Timer 0 input 2—edge interrupt enabled.
ADC analog input 2.
Timer 0 input 2; dedicated input.
GPIO/Timer 0 input 1.
GPIO/Timer 0 input 1—edge interrupt enabled.
ADC analog input 1.
Reserved; do not use.
GPIO/Timer 0 input 0.
GPIO/Timer 0 input 0—edge interrupt enabled.
ADC analog input 0.
Reserved; do not use.
GPIO.
Reserved; do not use.
Timer 0 output.
Reserved; do not use.
Z8FMC16100 Series Flash MCU
Interrupt Controller
Product Specification
GPIO Interrupts
chap-
39

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