Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 175

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Z8FMC04100

Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet

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PS024604-1005
Table 83. SPI Clock Phase and Clock Polarity Operation
Transfer Format Phase Equals Zero
Figure 25 illustrates the timing diagram for an SPI transfer in which
The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL set to
1. The diagram can be interpreted as either a master or slave timing diagram because the
SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly con-
nected between the master and the slave.
Figure 25. SPI Timing When Phase is 0
Input Sample Time
PHASE
(CLKPOL = 0)
(CLKPOL = 1)
0
0
1
1
MOSI
MISO
SCK
SCK
SS
CLKPOL
0
1
0
1
Bit 7
Bit 7
P R E L I M I N A R Y
Bit 6
Bit 6
SCK Transmit
Falling
Falling
Rising
Rising
Edge
Bit 5
Bit 5
Bit 4
Bit 4
Z8FMC16100 Series Flash MCU
SCK Receive
Bit 3
Bit 3
SPI Clock Phase and Polarity Control
Falling
Falling
Rising
Rising
Edge
Bit 2
Bit 2
Product Specification
PHASE
Bit 1
Bit 1
is cleared to 0.
SCK Idle
Bit 0
Bit 0
State
High
High
Low
Low
153

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