S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 106

• Manufacturer Part Number: S71GS128NB0
• Description: 128N based MCPs
• Manufacturer: SPANSION [SPANSION]

Notes:
1. CLK may be HIGH or LOW, but must be static during synchronous read, synchronous write, burst suspend, and DPD
2. The WAIT polarity is configured through the bus configuration register (BCR[10]).
3. When LB# and UB# are in select mode (LOW), DQ[15:0] are affected. When only LB# is in select mode, DQ[7:0]
4. The device will consume active power in this mode whenever addresses are changed.
5. When the device is in standby mode, address inputs and data inputs/outputs are internally isolated from any
6. V
7. DPD is maintained until RCR is reconfigured.
106
No Operation
Configuration
modes; and to achieve standby power during standby and active modes.
are affected. When only UB# is in the select mode, DQ[15:8] are affected.
external influence.
IN
Standby
Register
MODE
Write
Read
DPD
= V
CC
Q or 0V; all device balls must be static (unswitched) to achieve standby current.
Power-down
Standby
POWER
Active
Active
Active
Deep
Idle
Table 16. Bus Operations—Asynchronous Mode
(Note
CLK
X
X
X
X
X
X
1) ADV#
X
X
X
L
L
L
A d v a n c e
CellularRAM Type 2
CE#
H
H
L
L
L
L
OE#
X
X
X
H
X
L
I n f o r m a t i o n
WE#
H
X
X
X
L
L
CRE
H
X
L
L
L
L
LB#/
UB#
X
X
X
X
L
L
(Note
High-Z
High-Z
Low-Z
Low-Z
Low-Z
Low-Z
WAIT
2)
cellRAM_00_A0 October 4, 2004
Data-Out
DQ[15:0]
(Note
Data-In
High-Z
High-Z
High-Z
X
3)
NOTES
5,
4,
4
4
7
6
6