S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 146

• Manufacturer Part Number: S71GS128NB0
• Description: 128N based MCPs
• Manufacturer: SPANSION [SPANSION]

Notes:
1. Non-default BCR settings: Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
2. WAIT will assert LC + 1 or 2LC + 1 cycles for variable latency (depending upon refresh status).
146
Figure 47. Continuous Burst READ Showing an Output Delay with BCR[8] = 0 for End-of-Row Condition
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
WAIT
Symbol
Symbol
WE#
OE#
CE#
CLK
t
t
t
t
ACLK
KHTL
t
KOH
CLK
SP
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V OH
V OL
V OH
V OL
Table 42. Burst READ Timing Parameters—Burst Suspend (Continued)
t CLK
12.5
Min
Min
OUTPUT
Table 43. Burst READ Timing Parameters—BCR[8] = 0
VALID
3
2
70ns/80 MHz
70ns/80 MHz
t KHTL
OUTPUT
VALID
A d v a n c e
Max
Max
9
9
CellularRAM Type 2
(Note 2)
I n f o r m a t i o n
Min
Min
15
3
2
85ns/66 MHz
85ns/66 MHz
t KHTL
t ACLK
OUTPUT
VALID
Max
Max
11
11
Legend:
OUTPUT
cellRAM_00_A0 October 4, 2004
VALID
t OHZ
t KOH
Units
Units
Don't Care
ns
ns
ns
ns
ns