S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 167

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S71GS128NB0

Manufacturer Part Number
S71GS128NB0
Description
128N based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
Note: CE# can stay LOW when transitioning between asynchronous operations. If CE# goes HIGH, it must remain HIGH
for at least 5ns (t
lularRAM™ Operation”
October 4, 2004 cellRAM_00_A0
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
Symbol
WAIT
Symbol
WE#
OE#
CE#
t
t
t
t
t
WR
AW
BW
CW
AS
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V OH
V OL
V IH
V IL
Figure 59. Asynchronous WRITE Followed by Asynchronous READ—ADV# LOW
Table 59. Asynchronous WRITE Timing Parameters Using ADV# (Continued)
CBPH
High-Z
) to schedule the appropriate internal refresh operation. See
for restrictions on the maximum CE# LOW time (t
t AS
t WHZ
Address
t CW
Valid
Min
Min
A d v a n c e
70
70
70
t WP t WPH
0
0
DATA
Table 60. WRITE Timing Parameters—ADV# LOW
t DH
70ns/80 MHz
70ns/80 MHz
t WC
t AW
t BW
Address
DATA
t DW
Valid
t WR
I n f o r m a t i o n
Max
Max
CellularRAM Type 2
High-Z
t HZ
(Note)
t CBPH
Min
Min
85
85
85
0
0
V OH
V OL
85ns/66 MHz
CEM
85ns/66 MHz
t BLZ
).
t LZ
Legend:
t AA
t CEM
“How Extended Timings Impact Cel-
Address
Valid
Max
Max
t OLZ
t OE
Don't Care
t HZ
Output
Valid
t HZ
t BHZ
t OHZ
Units
Units
Undefined
ns
ns
ns
ns
ns
167

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