VT8601 Via, VT8601 Datasheet - Page 138

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

Texture Engine Registers
The texture Engine handles texture access and filtering. It is
controlled by the Span Engine. It accepts texture coordinates
from the Rasterization Engine, generates and passes addresses
to the Memory Interface, accepts raw texel data from the
Memory Interface, does filtering, and passes the results to the
Data Path.
GEbase + A0 – Texture Control ....................................... RW
Textures are aligned to 64-bit boundaries on a scanline basis.
Revision 1.3 September 8, 1999
29-28 Texture U Boundary Checking Function
27-26 Texture V Boundary
31
30
25
24
23
22
21
20
7HFKQRORJLHV ,QF
Texture Access Control
Filtering Control
Texture in System Memory
Reserved (must be 0)
MipMap
Intra-map Filter
Inter-map Filter
Magnify Filter (when LOD < 0)
:H &
:H &R R QQHFW
00 Texture U wraparound
01 Texture U mirroring
10 Texture U clamping
11 -reserved-
00 Texture V wraparound
01 Texture V mirroring
10 Texture V clamping
11 -reserved-
0
1
0
1
0
1
0
1
0
1
0
1
0
1
QQHFW
Disable (use cache)
Enable (bypass cache)
Filter with color key. Treat alpha value for
keyed texels as 0
Downgrade
fractional bits of UV and key test result. Set
alpha to 0 for keyed texels.
Texture is stored in graphics memory
Texture is stored in system memory
Disable
Enable
Disable
Enable (do filtering inside a LOD level)
Disable
Enable (do filtering inside a LOD level)
M must be 1.
Point Sample
Bi-linear
filtering
function
based
on
-132
Note: For MipMap textures, TRX/TRY is the size of the
original texture (1:1 map)
16-15 Palette Data Format
14-12 Texel Depth
11-8 Texture Map Levels (TML) (Range 0-8)
7-4
3-0
19
18
17
Tiling
Texture Color Key
Texture Anisotropy
The number of maps in the MipMap (0 = 1 map)
Y-Axis Texture Memory Size (TRY) (Range 0-8)
This field determines the number of lsb’s (2**TRY)
of parameter V to be used in the Y axis. Any bit
higher than this will be ignored (wraparound).
X-Axis Texture Memory Size (TRX) (Range 0-8)
This field determines the number of lsb’s (2**TRX)
of parameter U to be used in the X axis. Any bit
higher than this will be ignored (wraparound).
000 1-bpp palettized
001 2-bpp palettized
010 4-bpp palettized
011 8-bpp palettized
100 16-bpp 565 RGB
101 16-bpp 1555 ARGB
110 16-bpp 4444 ARGB
111 32-bpp ARGB
00 565 RGB
01 1555 ARGB
10 4444 ARGB
11 -reserved-
0
1
0
1
0
1
Texture is not tiled
Texture is tiled.
Tile size is determined by texel depth:
Inside each tile, texels are organized into 2x2
subtiles in row major
Disable
Enable
Disable
Enable
Texel Depth (bpp)
16
32
1
2
4
8
VT8601 Apollo ProMedia
3D Graphics Engine Registers
Tile Size
16 x 16
8 x 16
8 x 8
4 x 8
4 x 4
2 x 4