VT8601 Via, VT8601 Datasheet - Page 28

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VT8601

Manufacturer Part Number
VT8601
Description
Slot-1 / Socket-370 PCI North Bridge
Manufacturer
Via
Datasheet

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Signal Name
VCC5
VCC3
VSUS3
VSUS2
VCCI
VCCD
VCCR
VTT
GTLREF
GND
NC
Revision 1.3 September 8, 1999
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N3, N6, N11-N16, N21, P1, P6,
F16, F21, H24, J26, L11, L13,
P11-P16, P21, R12-R15, T11,
T12, T15, U21, W6, Y6, Y21,
G21, H6, K21, L4, L12, L15,
A9, A18, A26, B2, C8, C14,
C19, D4, D23, F6, F13-F14,
F7, F10, F12, F17, F20, G6,
L14, L16, M12-M15, M21,
AA3-AA5, AB1-AB4, AC1
A2-A5, B3-B5, C3-C5, Y5,
M11, M16, R11, R16, T4,
AA7, AA10, AA17, AA20
F9, F18, J6, J21, V6, V21,
T13, T14, T16, T21, V26,
W24, AA6, AA13-AA15,
AA21, AC4, AC23, AD8,
AD13, AD19, AF1, AF9,
V22, W22, AB22
AF18, AF26
AA9, AA18
E11, F19
E12, E21
AA22
Pin #
W1
U6
D1
Digital Power and Ground
I/O
P
P
P
P
P
P
P
P
P
P
-
Signal Description
Power for Display / Video Interfaces (5V ±5%). Power for CRT
H/VSYNC, DFP interface, video interface, and TV interface. Used to
provide adequate output voltage swing for driving external video
devices. Also used to provide 5V input tolerance from those interfaces.
Power for On-Board Interfaces (2.5V to 3.3V ±5%). Power for host
CPU / L2 Cache interface, PCI bus interface, and memory interface
(except pins listed below under VSUS).
Suspend Power (3.3V ±5%). Power for memory interface signals
SRASC#, SCASC#, SWEC#, SWEB#, RAS[5-0]#, CAS[7-0]#, and
MECC[7-0] as well as SUSTAT# and SUSCLK. Connect to VCC3 if
suspend functions are not implemented.
Suspend Power (2.5V ±5%). Connect to VCCI if suspend functions
are not implemented.
Power for On-Chip Internal Logic (2.5V ±5%).
Power for Video Clock Synthesizer Digital Logic (2.5V ±5%).
Connect to VCCI through a ferrite bead and decouple to main ground
plane GND with 0.001uF and 0.1uF ceramic and 10uF tantalum
capacitors (see “Apollo ProMedia Design Guide”).
Power for RAMDAC Video Output Digital Logic (2.5V ±5%).
Connect to VCCI through a ferrite bead and decouple to main ground
plane GND with 0.001uF and 0.1uF ceramic and 10uF tantalum
capacitors (see “Apollo ProMedia Design Guide”).
CPU Interface Termination Voltage (1.5V ±10%).
CPU Interface GTL+ Voltage Reference. 2/3 VTT ±2%. Derived
from the termination voltage to the pullup resistors. Determines the
noise margin for the host CPU interface signals. Internally connects to
the GTL
Ground. Connect to primary PCB ground plane.
No Connect.
-22-
+
sense amp on each GTL
+
VT8601 Apollo ProMedia
input or I/O pin.
Pinouts

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