VT8601 Via, VT8601 Datasheet - Page 98

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VT8601

Manufacturer Part Number
VT8601
Description
Slot-1 / Socket-370 PCI North Bridge
Manufacturer
Via
Datasheet

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CR1F – Software Programming ...................................... RW
Memory size is automatically detected during system setup.
CR20 – Command FIFO ................................................... RW
CR21 – Linear Addressing ............................................... RW
This register is write protected by SRE_New[7].
CR22 – CPU Latch Readback ........................................... RO
CR24 – VGA Attribute State ............................................. RO
CR25 – RAMDAC Read/Write Timing ........................... RW
CR27 – CRT High Order Start Address ......................... RW
Revision 1.3 September 8, 1999
7-4
3-0
7-6
3-0
7-6
4-0
7-0
6-0
6-4
3-0
2-0
5
4
5
7
7
7
6
5
4
3
7HFKQRORJLHV ,QF
Reserved
Display Memory Size
All other codes are reserved
Reserved
Write Buffer
16-Bit Planar Mode
Reserved
Reserved
Linear Memory Access
Reserved
Latched Data
Pointed to by GR4 (VGA Read Map Select Register
)
VGA Attribute State
Reserved
PCLK / P[7-0] BufferTristate Control
Reserved
RAMDAC Read / Write Wait States..... def =1111b
Vertical Total Bit-10 ................................ default = 0
Vertical Blanking Start Bit-10 ............... default = 0
Vertical Retrace Start Bit-10 ................. default = 0
Vertical Display Enable End Bit-10 ....... default = 0
Line Compare Bit-10 .............................. default = 0
Start Address Bits 19-17 ......................... default = 0
:H &
:H &R R QQHFW
0011 1MB
0111 2MB
1111 4MB
0100 8MB
0
1
0
1
0
1
0
1
0
1
QQHFW
Disable ....................................................defaul
Enable
Disable ....................................................defaul
Enable
Disable ....................................................defaul
Enable
Index ......................................................defaul
Data
Enable......................................................defaul
Disable
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
-92
CR29 – RAMDAC Mode ................................................. RW
This register is write protected by SRE_New[7]
CR2A – Interface Select ................................................... RW
This register is write protected by SRE_New[7]
5-4
1-0
3-0
7
6
3
2
7
6
5
4
External DAC
Reserved
CRTC Offset[9:8] for High or True Color Modes
GE I/O Decode
RAMDAC
RS[3-2] for RAMDAC (if register access definition
is selected)
Reserved
Internal Data Path Width
Reserved
Power Down Mode Using ROMCS#
Reserved
0
1
0
1
0
1
0
1
0
1
Disable.................................................... defaul
Enable
Disable.................................................... defaul
Enable
External .................................................. defaul
Internal
8/16-bit ................................................... defaul
32-bit
Enable..................................................... defaul
Disable
........................................ always reads 0
........................................ always reads 0
...................................... always reads 1
........................................ always reads 0
VT8601 Apollo ProMedia
VGA Extended Registers

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