VT8601 Via, VT8601 Datasheet - Page 71

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

VGA Standard Registers - Introduction
The standard VGA register set consists of five sets of indexed
registers plus several individually addressed registers. All
VGA registers are addressed at specific I/O port addresses
defined by the VGA legacy standard.
The non-indexed registers (also called the “Status / Enable”
registers) are:
The indexed register sets each control different functional
blocks inside the hardware VGA logic. These register sets
are:
Indexed registers typically require two sequential port
addresses, the first of which is the index and the second of
which is the data. In other words, the index is written to the
first port address and then the data corresponding to that
indexed register is read from or written to the second port
address. The exceptions to this are the Attribute Controller
and the RAMDAC. For the Attribute Controller, the index is
written at 3C0 as expected. Data reads (but not writes) can be
performed from port 3C1 in the standard way. However,
generally most data read and all data write operations use the
same 3C0 port as used for the index. Data and address are
accessed on alternate operations to 3C0 with an internal flag
to keep track of where the next operation is to be performed
(reads from 3BA or 3DA reset the flag to point at the index
register).
structure is the RAMDAC which uses three port addresses. In
this case, there are two locations provided for the index, 3C7
and 3C8, with the data at 3C9. There is actually only one
index register, but automatic pre / post incrementation is
performed differently depending on whether the index is
written at the “Read” address (3C7) or the “Write” address
(3C8). The current index value may be read at 3C8. Refer to
the RAMDAC register group for further explanation of the
operation of the index registes and sequential access to the
three data bytes of each indexed data location.
The number of registers listed above for each indexed register
group is the number of registers defined by the VGA standard.
The operation of these “base” registers will always be exactly
the same from one vendor’s implementation of the VGA to
another.
standard / extended functions implemented in higher
numbered index values. That is the case for this chip as well,
Revision 1.3 September 8, 1999
Input Status Register 0
Input Status Register 1
Miscellaneous Register Read at 3CC, Write at 3C2
Video Subsystem Enable Read/Write at 3C3
Display Adapter Enable Read/Write at 46E8
Attribute Controller
Sequencer
Graphics Controller
CRT Controller
RAMDAC
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:H &
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Typically, however, there are additional non-
The other exception to the 2-port index/data
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Read at 3C2
Read at 3BA or 3DA
21 registers (0-14h) at 3C0/1
5 registers (0-4h) at 3C4/5
9 registers (0-8h) at 3CE/F
25 registers (0-18h) at 3x4/5
256 24-bit registers at 3C7-3C9
-65
where extended functions are provided in all indexed register
groups except the Attribute Controller (due to the unusual
nature of Attribute Controller indexing using a single I/O port
which makes access to this register group more cumbersome).
This document will detail the functions of all the standard
VGA registers first.
separately documented in following sections.
Regarding notation used in this document, indexed registers
(including extended registers) may be referenced using a 2-
letter mnemonic from the following table followed by the
index number:
For example, index register 26h of the 3CE / 3CFh indexed
register group could also be referred to as GR26. Bit-7 if this
register, using this notation, would be GR26[7].
Register groups, for the most part, are included in this
document in order by I/O port address. Some registers are
included out of order with other registers in the same
functional block.
register summary tables at the beginning of the register section
of this document for further information and help in finding
descriptive information for a specific register.
For standard VGA registers, primarily only the bit definitions
are provided here.
standardized long ago, full explanation of the operation of
these bits is not provided in this document.
explanation of these bits is provided by many fine indiustry
publications (check your local computer book store or the
internet for further information).
Attribute Controller
Graphics Controller
CRT Controller
Sequencer
Graphics Accelerator PCI Bus Master Registers
Refer to the table of contents and the
Since the operation of these bits was
All extended functions will then be
VT8601 Apollo ProMedia
AR
GR
CR
SR
Detailed