VT8601 Via, VT8601 Datasheet - Page 43

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

Device 0 Offset 52 – Dynamic Defer Timer (10h) ........... RW
Revision 1.3 September 8, 1999
4-0
7
6
5
7HFKQRORJLHV ,QF
GTL I/O Buffer Pullup ...........default = MA13 Strap
The default value of this bit is determined by a strap
on the MA13 pin during reset.
RAW Write Retire After 2 Writes
Reserved
Snoop Stall Count
01-1F Snoop stall count ........................ default = 10h
:H &
:H &R R QQHFW
00 Disable dynamic defer
0
1
0
1
QQHFW
Disable
Enable
Disable ...................................................default
Enable
........................................ always reads 0
-37-
Device 0 Offset 53 – Miscellaneous (00h) ........................ RW
1-0
7
6
5
4
3
2
Setting this bit enables the DRAM subsystem to run at
a higher frequency than the CPU FSB frequency.
When setting this bit, register bit Rx69[6] must also be
set and only SDRAM memory type DIMM modules
may be installed.
DRAM subsystem is not supported in this case.
HREQ Function
DRAM Frequency Higher Than CPU FSB
AGP/PCI-to-CPU Master / CPU-to-PCI Slave
Concurrency
HPRI Function
P6Lock Function
P6Lock
Reserved
0
1
0
1
0
1
0
1
0
1
0
1
Disable................................................... default
Enable
Disable................................................... default
Enable
Disable................................................... default
Enable
Disable................................................... default
Enable
Disable................................................... default
Enable
Disable................................................... default
Enable
........................................always reads 0
Device 0 Bus 0 Host Bridge Registers
VT8601 Apollo ProMedia
An EDO / SDRAM mix in the