VT8601 Via, VT8601 Datasheet - Page 25

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

Signal Name
RED
GRN
BLUE
HSYNC
VSYNC
SDA
SCL
Signal Name
PD[23-0]
SCLK
DE
LP
FLM
EVDD
EVEE
EBLT
Note: Connect SHFCLK, DE, LP, and FLM to external TMDS transmitters through series 22
ProMedia Design Guide” for DFP interface design examples and additional information.
Revision 1.3 September 8, 1999
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(see pin list)
Pin #
Pin #
D3
D2
G4
H3
G5
G3
H5
G1
C2
E2
E1
F2
F3
F1
I/O
I/O
IO
IO
O
O
O
O
O
O
O
O
O
O
A
A
A
Signal Description
Red. Red analog output to the CRT. Connect 75
and connect to VGA connector through a series ferrite bead and 10pF capacitors to GNDR
on both input and output sides of the bead (see “Apollo ProMedia Design Guide”).
Green. Green analog output to the CRT. Connect same as RED.
Blue. Blue analog output to the CRT. Connect same as RED.
Horizontal Sync. Digital horizontal sync output to the CRT. Also used (with VSYNC)
to signal power management state information to the CRT per the VESA™ DPMS™
standard. Connect to VGA connector through a series 47
to ground (see “Apollo ProMedia Design Guide”).
Vertical Sync. Digital vertical sync output to the CRT. Also used (with HSYNC) to
signal power management state information to the CRT per the VESA™ DPMS™
standard. Connect to VGA connector through a series 47
to ground (see “Apollo ProMedia Design Guide”).
DDC Data/Address. Serial I
Connect this pin to VCC5 through a 4.7K
(pin 12 of the connector). Connect through a ferrite bead and 120pF capacitor to ground
(on the output side of the bead). Refer to the “Apollo ProMedia Design Guide” for
additional information.
DDC Clock. Serial I
pin to VCC5 through a 4.7K pullup. Connect to the VGA connector only (pin 15 of the
VGA connector). Connect through a ferrite bead and 120pF capacitor to ground (on the
output side of the bead). Refer to the “Apollo ProMedia Design Guide” for additional
information.
Signal Description
Panel Data. Digital pixel data outputs to the panel.
Shift Clock. Clock for transferring digital pixel data.
Data Enable. Indicates valid data on PD[23-0].
Line Pulse. Digital monitor equivalent of HSYNC.
First Line Marker. Digital monitor equivalent of VSYNC.
Enable Panel VDD Power.
Enable Panel VEE Power.
Enable Panel Backlight.
CRT Interface
DFP Interface
2
C protocol for VESA™ DDC2B signaling to the CRT. Connect this
-19-
2
C protocol for VESA™ DDC2B signaling to the CRT.
pullup. Connect to the VGA connector only
load resistor to GNDR (RGB Return)
VT8601 Apollo ProMedia
resistor and 120pF capacitor
resistor and 120pF capacitor
resistors. See the “Apollo
Pinouts