MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 103

• Manufacturer Part Number: MC56F8035VLDR
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLDR

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

6.3.21.1
This bit field is reserved. Each bit must be set to 0.
6.3.21.2
This field selects the alternate input source signal to feed PWM input FAULT2.
6.3.21.3
This bit field is reserved. It must be set to 0.
6.3.21.4
This field selects the alternate input source signal to feed PWM input FAULT1.
6.3.21.5
This bit field is reserved. Each bit must be set to 0.
6.3.21.6
This field selects the alternate input source signal to feed PWM input PSRC2 as the PWM4/PWM5 pair
source.
Freescale Semiconductor
Base + $18
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RESET
Read
Write
0 = I/O Pin (External) - Use PWM FAULT2 Input Pin (default)
1 = CMPBO (Internal) - Use Comparator B Output
0 = I/O pin (External) - Use PWM FAULT2 Input Pin (default)
1 = CMPAO (Internal) - Use Comparator A Output
000 = Reserved (default)
001 = TA3 (Internal) - Use Timer A3 output as PWM source
010 = ADC SAMPLE2 (Internal) - Use ADC SAMPLE2 result as PWM source
— If the ADC conversion result in SAMPLE2 is greater than the value programmed into the High Limit
— If the ADC conversion result in SAMPLE2 is less than the value programmed into the Low Limit
011 = CMPAO (Internal) - Use Comparator A output as PWM source
100 = CMPBO (Internal) - Use Comparator B output as PWM source
Figure 6-25 Internal Peripheral Source Select Register for PWM (SIM_IPS0)
register HLMT2, then PWM4 is set to 0 and PWM5 is set to 1
register LLMT2, then PWM4 is set to 1 and PWM5 is set to 0
Reserved—Bits 15–14
Select Peripheral Input Source for FAULT2 (IPS0_FAULT2)—Bit 13
Reserved—Bit 12
Select Input Source for FAULT1 (IPS0_FAULT1)—Bit 11
Reserved—Bits 10–9
Select Peripheral Input Source for PWM4/PWM5 Pair Source
(IPS0_PSRC2)—Bits 8–6
15
0
0
14
0
0
FAULT2
IPS0_
13
0
12
0
0
56F8035/56F8025 Data Sheet, Rev. 6
FAULT1
IPS0_
11
0
10
0
0
9
0
0
8
0
IPS0_PSRC2
7
0
6
0
5
0
IPS0_PSRC1
4
0
3
0
Register Descriptions
2
0
IPS0_PSRC0
1
0
0
0
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