MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 31

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MC56F8035VLDR

Manufacturer Part Number
MC56F8035VLDR
Description
Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC56F8035VLDR

Rohs
yes
Core
56800E
Data Bus Width
16 bit
Program Memory Size
64 KB
Data Ram Size
8 KB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Device Million Instructions Per Second
32 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-44
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8035VLDR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Return to
(GPIOD0)
(V
(EXTAL)
GPIOC7
GPIOD4
GPIOD5
(CLKIN)
(ANB3)
Table 2-3 56F8035/56F8025 Signal and Package Information for the 44-Pin LQFP
(XTAL)
Signal
Name
REFLB
TDI
)
Table 2-2
Pin No.
LQFP
10
38
37
41
Analog
Analog
Analog
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
Input
Input
Input
State During
enabled
internal
pull-up
Reset
Input,
56F8035/56F8025 Data Sheet, Rev. 6
Input
Input
Input
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB3 — Analog input to ADC B, Channel 3.
V
After reset, the default state is GPIOC7.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
External Crystal Oscillator Input — This input can be connected to
an 8MHz external crystal. Tie this pin low if XTAL is being driven by
an external clock source.
After reset, the default state is GPIOD4.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
External Crystal Oscillator Output — This output connects the
internal crystal oscillator output to an external crystal.
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOD5.
Test Data Input — This input pin provides a serial input data stream
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDI.
REFLB
— Analog reference voltage low (ADC B).
Signal Description
56F8035/56F8025 Signal Pins
31

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