MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 28

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MC56F8035VLDR

Manufacturer Part Number
MC56F8035VLDR
Description
Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC56F8035VLDR

Rohs
yes
Core
56800E
Data Bus Width
16 bit
Program Memory Size
64 KB
Data Ram Size
8 KB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Device Million Instructions Per Second
32 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-44
Mounting Style
SMD/SMT

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9
10
Return to
The SDA signal is also brought out on the GPIOB1 pin.
(FAULT3)
The SCL signal is also brought out on the GPIOB0 pin.
GPIOB5
(CLKIN)
GPIOB6
GPIOB7
(CLKIN)
(SCL
(RXD0)
Table 2-3 56F8035/56F8025 Signal and Package Information for the 44-Pin LQFP
(SDA
(TXD0)
Signal
Name
(TA1)
10
9
)
)
Table 2-2
Pin No.
LQFP
4
1
3
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
Input
Input
State During
enabled
enabled
enabled
internal
internal
internal
pull-up
pull-up
pull-up
Reset
Input,
Input,
Input,
56F8035/56F8025 Data Sheet, Rev. 6
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA1 — Timer A, Channel 1
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data 0 — QSCI0 receive data input.
Serial Data — This pin serves as the I
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOB6. The peripheral functionality
is controlled via the SIM (See
of the OCCS Oscillator Control Register.
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Transmit Data 0 — QSCI0 transmit data output or transmit/receive
in single wire operation.
Serial Clock — This pin serves as the I
After reset, the default state is GPIOB7. The peripheral functionality
is controlled via the SIM. See
Signal Description
Section
Section
Section
6.3.16) and the CLKMODE bit
2
6.3.16.
6.3.16.
C serial data line.
2
C serial clock.
Freescale Semiconductor

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